Thin layer structure made up of conductive and insulative zones

ABSTRACT

A structure comprising a thin layer ( 2 ) that can be integral with a support ( 3 ), the thin layer being a layer of a semiconductor material made insulating by ion implantation except for at least one zone that permits a vertical electrical connection through the entire thickness of the thin layer ( 2 ). A method of manufacturing such a structure is also disclosed.

TECHNOLOGICAL FIELD

[0001] This invention relates to a structure comprising a thin layer ofmaterial made up of conductive zones and insulating zones. It alsorelates to the method of manufacturing such a structure.

STATE OF THE PRIOR TECHNOLOGY

[0002] Certain components created on the surface of a substrate require,in order to be used, that an electric current is able to pass throughthe thickness of the substrate, that is to say, in the verticaldirection with respect to the plane of the substrate. One may mention asan example components with vertical operation: electroluminescentdiodes, laser diodes (in particular, laser diodes with a verticalcavity), photodetectors, hyperfrequency detectors (in particular,Schottky diodes), power components, solar cells. These components arerepresented diagrammatically in the form of doped substrates, on which,the active or non-active layers are produced by a specific dopingoperation. As a general rule, the electrical contacts are made on thefront facing surface and at the back of the component or at depth.

[0003] Power diodes have two contacts: the anode contact on the frontface and the cathode contact on the back face. For more sophisticatedpower components such as the MOSFETs, the IGBTs and the thyristorstructures, there is still one contact on the front face and one contacton the back face with one or more contact points at depth. However, forall these types of components, the electrical current passes between thefront and rear faces of the device (see for example the synthesisarticle entitles “Trends in power semiconductor devices” by B. JAYANTBALIGA, that appeared in IEEE Transactions on Electron Devices, Vol. 43,No. 10, October 1996).

[0004] One of the techniques used to provide active layers on thesubstrate is epitaxial growth. This technique consists of causing amaterial to grow in an ordered manner from a crystalline substratewhilst controlling its composition. Stacks of epitaxiated semiconductorlayers with variable doping levels can be produced in this way. If theepitaxiated semiconductor layers are of the same kind as the crystallinesubstrate, one refers to deposition by homo-epitaxy. If they are of adifferent kind, then this is deposition by hetero-epitaxy. Thistechnique permits the production of semiconductor layers of very smallthickness (a few tens of Angstrom units), of high purity and withinterfaces of excellent quality. However, this technique is veryexpensive and its low rate of deposition does not enable one to obtainsemiconductor layers of thickness greater than a few tens of micrometersin an industrial manner. Furthermore, the epitaxy of the layers can onlybe created if the substrate has crystal parameters which are close tothose of the material to be epitaxiated. In effect, if the crystalparameters are not sufficiently close, the limitation to the matchingthe lattice parameters greatly reduces the good optical and electronicproperties of the structures obtained by hetero-epitaxy. Therefore, thisseverely limits the number and the diversity of the layers that one isable to grow. In particular, one may mention the difficulty in obtainingcomponents from the III-V family of semiconductors on siliconsubstrates. For certain components, it is of interest to combine theadvantages of different semiconductors. By way of example, one canconsider the cases of an active layer of GaAs or an active layer of InPon silicon. This configuration allows one to associate the goodelectronic properties of the GaAs or InP materials at hyperfrequencywith a silicon substrate which has the advantage of being more robust,having less weight and which has better thermal conductivity than GaAs.One may also mention the case of a layer of GaN on a SiC substrate, astructure which offers many advantages for electronic power components.

[0005] In another field, solar cells for use in space are of greatinterest. In effect, energy for satellites is generally supplied bymeans of panels of solar cells. Among the various possibilities forproducing solar cells for use in space, one can mention solar cells madeof GaAs. The problem of gallium arsenide is its cost and above all itsweight and its fragile nature. In order to resolve this problem, it hasbeen proposed to produce solar cells from thin films of GaAs epitaxiatedonto a germanium substrate. A great improvement would consist ofproviding thin films of GaAs or InP on a silicon substrate. This type ofstructure would allow one to combine the advantages of GaAs (surfaceproperties to create the component constituting the solar cell) and theadvantages of silicon as a support (weight three times less than that ofGaAs and much less fragile).

[0006] In order to produce these structures made up of a thin film,integral with a substrate of a different material, processes other thanhetero-epitaxy can be used. In particular, one may mention the methodsof bringing semiconductor substrates into contact by bonding them usingmolecular adhesion or techniques for transferring thin films. The methoddisclosed by the document FR-A-2 681 472 offers numerous advantages. Itallows one to transfer a thin semiconductor film with a large surfacearea (of a few thousand Angstrom units with a few micrometers ofthickness), from its original substrate to the desired support by acombination of ionic implantation (using light ions), bonding bymolecular adhesion and an appropriate heat treatment.

[0007] This transfer technique has been the subject of otherdevelopments. According to document FR-A- 2 748 851, the ionimplantation step is carried out with an ion dose which is between aminimum dose and a maximum dose. The minimum dose is that from whichsufficient micro-cavities will be created to provide weakening of thesubstrate along the reference plane. The maximum dose, or critical doseis that above which, during the heat treatment step, there is separationof the substrate. The separation step comprises the application ofmechanical forces between the two parts of the substrate.

[0008] If the thin film defined in the substrate is sufficiently rigiditself (because of its thickness or because of its mechanicalproperties), after the transfer annealing, one can obtain aself-supporting film. This is what is disclosed in document FR-A-2 738671.

[0009] Document FR-A-2 767 416 discloses that it is possible to lowerthe annealing temperature if the thermal budget supplied to thesubstrate during the various steps of the method is taken into account(ion implantation step, possibly a step of bonding the substrate to astiffener, possible intermediate treatments, an annealing step to allowseparation). By the term thermal budget one understands that for a stepwhere thermal energy is supplied (for example during an annealing step),one must not only consider the temperature but the time-temperaturecouple supplied to the substrate.

[0010] This technique is used now for the industrial manufacture of SOIsubstrates (see the article by A. J. AUBERTON et al., entitled “SOImaterials for ULSI applications” that appeared in SemiconductorInternational, 1995, Vol. 11, pages 97-104). The feasibility of thistechnique to III-V semiconductor materials such as GaAs has recentlybeen demonstrated (see the article by E. JALAGUIER et al., entitled“Transfer of 3 in GaAs Film on Silicon Substrate by Proton ImplantationProcess” published in Electronics Letters, Feb. 19, 1998, Vol. 34, No.4, pages 408-409). For such a structure, made up of a thin film of GaAson a silicon support, bonding by using an intermediate layer of siliconoxide has been used. The thin layer of GaAs is therefore electricallyinsulated from the silicon support. In the case of a solar cellconstituted in this way, it is necessary to make an electricalconnection on the front face and an electrical connection on the backface, electrical connection with the photo-voltaic thin layer being madethrough the substrate.

[0011] One solution to this problem can be found by choosing aconductive interface between the thin layer and its support, thisinterface then having also to provide the adhesion of the two parts.Several techniques have been suggested to achieve this. They are givenbelow.

[0012] It is possible to provide a direct bond between two semiconductorelements which provide a good electrical contact between these twoelements. On this subject one can make reference to the followingarticles

[0013] “Electrical characteristics of directly-bonded GaAs and InP” byH. WADA et al., that appeared in Appl. Phys. Lett., 62(7), Feb. 15, 1993“Low-resistance ohmic conduction across compound semiconductorwafer-bonded interfaces” by F. A. KISH et al., that appeared in Appl.Phys. Lett., 67(14), Oct. 2, 1995.

[0014] The techniques described in these articles are however ratherrestricting. They frequently demand very good preparation of thesurfaces before bonding, often under ultra-vacuum conditions and/or alsopost-bonding heat treatments at a high temperature (from 600 to 1000°C.) under a reducing atmosphere of hydrogen. These conditions aredifficult to implement, in particular when the two semiconductormaterials have very different coefficients of thermal expansion (forexample, GaAs in relation to Si or SiC). In this case, it is necessaryto use low temperature bonding.

[0015] Another possibility consists of bringing the two semiconductorelements into contact using previously deposited metal layers. Thissolution is described in the article “Low Temperature Bonding ofEpitaxial Lift-Off Devices with AuSn” by G. RAINER DOHLE et al., thatappeared in IEEE Transactions on Components, Packaging and ManufacturingTechnology—Part B, Vol. 19, No. 13, August 1996.

[0016] In addition, a development of the method described in thedocument FR-A-2 681 472, mentioned above, has been disclosed in documentFR-A-2 758 907. This latter document discloses that, under certainconditions, a masking technique can be used to protect sensitive zonesof the future thin layer (for example, constituent zones of MOStransistors) from the passage of ions intended to create themicro-cavities. This implies an absence of micro-cavities in the zonesof the bombarded substrate corresponding to the masked areas. Despiteall this, cleavage of the substrate can be obtained allowing detachmentof a thin film if the width of each masked area does not exceed alimiting value that is specified for the material that constitutes thesubstrate.

[0017] One might then think, given the state of the art described above,that the method of transferring a thin semiconductor layer disclosed bythe document FRA-2 681 472 would allow one to obtain a thin layer ofGaAs integral with a silicon support using a conductive interface andthat an electrical connection would be possible between the thin layerof GaAs and the silicon support. However, the application of this methodof transfer has revealed the following problem. The ion implantationstep is generally carried out using light ions such as hydrogen ions. Itis found that the passage of hydrogen ions in the GaAs has the effect ofconsiderably modifying the resistivity of the region bombarded by theseions. Hence, a region of GaAs with an initial resistivity of the orderof 1 mΩ.cm, sees its resistivity reach a value of the order of 10⁵ Ω.cm,after bombardment with hydrogen ions. This phenomenon is due to thehydrogen which has created centers deep within the GaAs. The result isthat a film of GaAs epitaxiated onto a thin layer of GaAs transferredonto a silicon support would be electrically insulated from the support.

[0018] To remedy this problem, one can consider using species other thanhydrogen to carry out the ion implantation. Hydrogen is howeverpreferred for practical reasons. One may also attempt to restore acertain conductivity to the thin layer of GaAs by means of annealingtreatments subsequent to the cleavage. However, these annealingtreatments imply a break in the progress of the manufacturing processand are not always desirable.

DESCRIPTION OF THE INVENTION

[0019] So as to remedy the disadvantages of the prior art, a structureis proposed that is obtained by the method described in document FR-A-2681 472, this method being modified so that the conductive orsemiconductive layer to be transferred, which is a layer capable ofbeing corrupted by the ion bombardment, is locally protected. Thisprotection allows a transferable layer to be provided that has zoneswith electrical properties that have not been corrupted.

[0020] Hence a subject of the invention is a method of manufacturing athin layer, the thin layer having to provide at least one verticalelectrical connection through its entire thickness, the thin layer beingmade of a conductive or semiconductive material capable of having itselectrical properties disrupted when it is subjected to an ionimplantation using specified species, the method comprising thefollowing steps:

[0021] masking one face of a substrate comprising said material bymasking means that define at least one masked area, the size of whichdoes not exceed a limiting dimension specified for said material, thislimiting dimension having to permit splitting of the substrate at thetime of the subsequent step of cleavage

[0022] ion implantation of the substrate through its masked face bymeans of said species, the implantation being capable of creating,within the non-masked volume of the substrate and at a depth close tothe mean depth of penetration of the species, a layer of micro-cavitiesdefining said thin layer

[0023] possible removal of said masking means

[0024] cleavage of the substrate at the level of the layer ofmicro-cavities in order to obtain said thin layer.

[0025] The implanted face of the substrate can be made integral with asupport before the cleavage step. It can also be made integral with asupport after the cleavage step.

[0026] The cleavage step corresponds to a separation of the thin layerand the substrate.

[0027] The masking means can comprise deposits of a material capable ofpreventing penetration of the ions into the substrate during the ionimplantation, these deposits being deposited on said face of thesubstrate. They can also comprise micro-elements deposited on said faceof the substrate. These micro-elements can be chosen from amongmicro-beads and particles.

[0028] The masking can be carried out in such a way that the thin layer,retains overall, the electrical properties of the substrate. It can alsobe created in such a way that the thin layer behaves overall like aninsulating layer except for at least one part formed from one zone orseveral neighboring zones that retain the electrical properties of thesubstrate. In this case, the part formed by this zone or by theseneighboring zones that retain the electrical properties of the substratecan constitute a conductive path or a conductive track.

[0029] Integration of the substrate with a support can be achieved by amethod chosen between bonding by molecular adhesion and bonding by meansof a brazing material, for example a brazing material based on indium.

[0030] Before the integration, the method can comprise a step ofpreparing a conductive interface between said face of the substrate andthe support. This step of preparing a conductive interface can comprisethe deposition of a metal layer on the face of the substrate and/or onthe face of the support, for example, the deposition of a layer ofpalladium. Associated with this metal layer can be the deposition ofconductive metal bonding materials, for example, successive depositionsof titanium, nickel and gold. A heat treatment can be carried out in away to cause the diffusion of the deposited metal layer. The metalmaterial is preferably chosen to react with at least a part of thematerial of the substrate and/or the support.

[0031] This method is advantageously applicable to the manufacture of astructure comprising a thin layer of SiC, GaAs or InP on a support, theion implantation using hydrogen and/or helium ions. The support cannotably be silicon.

[0032] Another subject of the invention is a structure comprising a thinlayer, the thin layer being a layer of conductive or semiconductivematerial made insulating by ion implantation except for at least onezone that permits a vertical electrical connection through the entirethickness of the thin layer.

[0033] According to a first variant, the thin layer comprises amultitude of zones, these zones being distributed over the whole surfaceof the thin layer. According to a second variant, the thin layercomprises one zone or a plurality of zones, concentrated in order toconstitute at least one conductive path or at least one conductivetrack.

[0034] The thin layer can be integral with a support through the use ofan intermediate conductive interface so as to allow electricalconnection between these two elements. This conductive interface can beconstituted by a metal layer, for example a layer of palladium.Associated with this metal layer can be the deposition of conductivemetal bonding materials, for example, successive depositions oftitanium, nickel and gold.

[0035] The thin layer can also be made integral with a support by usinga brazing material, for example a brazing material based on indium.

[0036] Advantageously, the semiconductor material of the thin layer ischosen from among SiC, GaAs and InP. The support can notably be silicon.

BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The invention will be better understood and other advantages andparticular features will become apparent on reading the descriptionwhich will follow, given by way of a non-limitative example, accompaniedby the appended drawings among which:

[0038] FIGS. 1 to 3 illustrate different steps of the method ofmanufacture according to this invention

[0039]FIG. 4 represents, in cross section, a structure according to thisinvention, in a particular application,

[0040]FIG. 5 is an enlarged view of the detail marked V in FIG. 4.

DETAILED DESCRIPTION OF AN EMBODIMENT OF THE INVENTION

[0041] FIGS. 1 to 3 are cross section views. FIG. 1 shows asemiconductor substrate 1, for example, a substrate made of GaAs. Thesubstrate 1 is intended to provide the thin layer 2 of a structure byintegration with a support 3, for example made of silicon (see FIGS. 2to 5).

[0042] Deposits 4 are made onto the upper face 5 of the substrate 1which are capable of stopping the ions which will subsequently beimplanted into the volume of substrate through face 5. The deposits 4can be resin deposits or deposits of another material (oxide, metal,etc.). The thickness of the deposits is such that ions are preventedfrom penetrating into the substrate. The size of the deposits is, forexample, of the order of from 1 to 2 μm.

[0043]FIG. 2 illustrates the ion implantation step. Hydrogen ions are,for example, used to bombard the substrate 1 through the upper face 5.The energy and the dose of the ions are chosen in such a way as toconstitute a layer of micro-cavities 6 at a distance from the face 5 ofthe substrate corresponding to the desired thickness of the thin layer2. By their passage, the hydrogen ions make the thin layer 2 insulating.However, the zones of the thin layer 2 masked by the deposits 4 are notaffected by the hydrogen ions. These masked zones therefore retain theirinitial electrical properties of the substrate 1.

[0044] By micro-cavity or gaseous micro-bubble, one understands anycavity generated by the implantation of ions of hydrogen gas and/or raregas in the material. The cavities can be of a very flattened shape, thatis to say of small height, for example, a few inter-atomic distances, orof spherical shape or any other shape different from these two precedingshapes. These cavities can contain a free gaseous phase and/or atoms ofgas arising from the implanted ions fixed onto atoms of the materialforming the walls of the cavities. These cavities are generally calledplatelets, micro-blisters or even bubbles.

[0045] By a layer of micro-cavities, one understands a region containingmicro-cavities which can be situated at various depths and which can beadjacent or non-adjacent to one another.

[0046] By gaseous species, one understands elements, for examplehydrogen or rare gases in their atomic form (for example H) or in theirmolecular form (for example H₂) or in their ionic form (for example H⁺,H²⁺) or in their isotopic form (for example deuterium) or isotopic andionic.

[0047] In addition, by ion implantation, one understands any type ofinjection of the species previously defined either alone or incombination, such as ionic bombardment, diffusion, etc.

[0048] The layer 6 of micro-cavities obtained in this way isdiscontinuous. However the discontinuities are of a small size (of theorder of 1 to 2 μm) and are not liable to modify the phenomenon of crackpropagation during the subsequent cleavage step.

[0049] After the ion implantation step, the deposits 4 made on the face5 of the substrate 1 are removed. The face 5 of the substrate 1 can bemade integral with a receiving surface of a support 3 by molecularadhesion (see FIG. 3). Before this integration step, the faces to bejoined are prepared in order to constitute a bonding interface. By wayof example, an ohmic contact of very low resistivity (1 Ω.cm) can beobtained if the bonding is carried out using an intermediate layer ofpalladium deposited on one of the faces or on both the faces to bejoined. A similar result can be obtained in the case of a brazingmaterial, such as an indium based brazing material.

[0050] Whatever the type of solid material, the heat treatment leads tocoalescence of the micro-cavities which leads to a weakening of thestructure at the level of the layer of micro-cavities. This weakeningpermits separation of the material under the effect of internal stressesand/or pressure within the micro-cavities. The separation can be naturalor assisted by the application of external stresses.

[0051] Hence, the cleavage of the substrate 1 along the layer ofmicro-cavities 6 is obtained, for example, solely following a suitableheat treatment or by combining a heat treatment and mechanical forces,for example, tensile forces and/or shearing forces and/or bending forcesor solely by the use of mechanical stresses. The mechanical forces canbe applied perpendicular to the planes of the layers and/or parallel tothem. They can be localized to one point or one area or can be appliedto different places in a symmetrical or non-symmetrical fashion. Thecleavage produces a structure comprising the thin layer 2 integral withthe support 3 or a self-supporting thin layer where the thin layer hasnot been made integral with a support.

[0052] The free face of the thin layer 2 can then be subjected to amechanical-chemical polishing operation. By epitaxy, layers 7 and 8 ofthe same semiconductor material as the thin layer 2, can then besuccessively deposited. A solar cell can be formed in this way bydepositing an n doped layer 7 and a p doped layer 8. As FIG. 5 shows,the assembly formed by the layers 7 and 8 is electrically connected tothe support 3 through zones 9 which have a side dimension for example of1 μm. If the zones 9 are constituted by a material with a resistivity of1 μ.cm, the resistance of a zone 9, for a thin layer 2 of thickness 100nm, is 1000 Ω. If the zones 9 are each spaced at 10 μm, the totaldensity of these zones is of the order of 10⁶/cm², which corresponds toa total apparent resistance of 0.001 Ω for a surface area of 1 cm² ofthin layer. If the surface area of a thin layer is for example 70 cm²,its resistance in the vertical direction is then of the order of 10⁻⁵ Ω.If such a solar cell receives a power of 1 kW/m², the recoverable powerfor an efficiency of 20% is 200 W/m². For a voltage of 1 Volt, this isequivalent to 200 A/m² or a current of 1.4 A for a structure of 70 cm².The resistance of this structure then leads to a voltage drop of 10⁵ V,or an absolutely negligible loss.

[0053] Given that the dimensions of the masked areas are small and thatthe exact positioning of the masking deposits is not important, thismasking can be carried out using very simple means, without lithography.These means are for example, masking by micro-beads deposited on theface 5 of the substrate 1 before the ion implantation step. Thesemicro-beads or other particles, can be made of glass, quartz or anyother suitable material. Their size varies from a few tenths of a μm toa few μm.

[0054] Depending on the application, the thin layer 2 can beheterogeneous, that is to say made up of materials of a different kindstacked one upon the other and/or aligned one by the side of the other.

[0055] Furthermore, the thin layer can be self-supporting when itsthickness, taking account of the nature of the material used to produceit, gives it sufficient rigidity to induce the separation. Thisself-supporting thin layer permits applications for example of theanisotropic conductive film type.

[0056] In order to obtain a thickness of thin layer that providessufficient rigidity, one can modify the implantation depth of thespecies and/or one can form an extra thickness of material, for example,by epitaxy or by hetero-epitaxy at the surface of the thin layer or bydeposition.

[0057] In addition, according to the invention, the implantation can bethe result of different species, implanted simultaneously orsuccessively (cf. FR-A-2 773 26).

1. Method of manufacturing a thin layer (2), the thin layer (2) havingto provide at least one vertical electrical connection through itsentire thickness, the thin layer (2) being made of a conductive orsemiconductive material capable of having its electrical propertiesdisrupted when it is subjected to an ion implantation using specifiedspecies, the method comprising the following steps masking one face (5)of a substrate (1) comprising said material by masking means (4) thatdefine at least one masked area, the size of which does not exceed alimiting dimension specified for said material, this limiting dimensionhaving to allow cleavage of the substrate (1) at the time of thesubsequent cleavage step ion implantation of the substrate (1) throughits masked face by means of said species, the implantation being capableof creating, within the non-masked volume of the substrate (1) and at adepth close to the mean depth of penetration of the species, a layer ofmicro-cavities (6) demarcating said thin layer (2) possible removal ofthe masking means (4) cleavage of the substrate (1) at the level of thelayer of micro-cavities (6) in order to obtain said thin layer. 2.Method according to claim 1, characterized in that the implanted face(5) of the substrate (1) is made integral with a support (3) before thecleavage step.
 3. Method according to claim 1, characterized in that thethin layer is made integral with a support after the cleavage step. 4.Method according to any one of claims 1 to 3, characterized in that themasking means (4) comprise deposits of a material capable of preventingpenetration of the ions into the substrate during the ion implantation,these deposits (4) being deposited on said face (5) of the substrate(1).
 5. Method according to claim 1, characterized in that the maskingmeans comprise micro-elements deposited on said face of the substrate.6. Method according to claim 5, characterized in that saidmicro-elements are chosen from among micro-beads and particles. 7.Method according to any one of claims 1 to 6, characterized in that themasking is carried out in such a way that the thin layer (2) overallpreserves the electrical properties of the substrate (1).
 8. Methodaccording to any one of claims 1 to 6, characterized in that the maskingis carried out in such a way that the thin layer (2) overall behaveslike an insulating layer except for at least one part formed from onezone or from several neighboring zones preserving the electricalproperties of the substrate (1).
 9. Method according to claim 8,characterized in that the part formed from this zone or from severalneighboring zones preserving the electrical properties of the substrate(1) constitutes a conductive path or a conductive track.
 10. Methodaccording to claim 2, characterized in that the step of integrating thesubstrate with the support is carried out by a method chosen betweenbonding by molecular adhesion and bonding by means of a brazingmaterial.
 11. Method according to claim 10, characterized in that saidbrazing material is based on indium.
 12. Method according to claim 2,characterized in that it includes, before the integration step, a stepof preparing a conductive interface between said face (5) of thesubstrate (1) and said support (3).
 13. Method according to claim 12,characterized in that the step of preparing a conductive interfacecomprises the deposition of a metal layer onto said face (5) of thesubstrate (1) and/or onto the support (3).
 14. Method according to claim13, characterized in that the said metal layer is a layer of palladium.15. Method according to one of claims 13 or 14, characterized in thatsaid interface metal layer is associated with the deposition ofconductive metal bonding materials.
 16. Method according to claim 15,characterized in that the conductive bonding materials are successivedeposits of titanium, nickel and gold.
 17. Method according to any oneof claims 13 to 16, characterized in that a heat treatment is carriedout in a way that causes diffusion of the deposited metal layer. 18.Application of the method according to any one of claims 1 to 17 to themanufacture of a structure comprising a thin layer of SiC, GaAs or InPon a support, the ion implantation being carried out using hydrogenand/or helium ions.
 19. Application according to claim 18, characterizedin that the support is made of silicon.
 20. Structure comprising a thinlayer (2), the thin layer (2) being a layer of conductive orsemiconductive material made insulating by ion implantation except forat least one zone (9) that allows a vertical electrical connectionthrough the entire thickness of the thin layer (2).
 21. Structureaccording to claim 20, characterized in that the thin layer comprises amultitude of zones, these zones being distributed over the entiresurface of the thin layer.
 22. Structure according to claim 20,characterized in that the thin layer comprises one zone or a pluralityof zones concentrated to constitute at least one conductive path or atleast one conductive track.
 23. Structure according to any one of claims20 to 22, characterized in that the thin layer (2) is made integral witha support (3) through an intermediate conductive interface. 24.Structure according to claim 23, characterized in that the conductiveinterface is constituted by a metal layer.
 25. Structure according toclaim 24, characterized in that the metal layer is a layer of palladium.26. Structure according to any one of claims 23 to 25, characterized inthat deposition of conductive bonding materials is associated with saidmetal interface layer.
 27. Structure according to claim 26,characterized in that the conductive bonding materials are successivedeposits of titanium, nickel and gold.
 28. Structure according to anyone of claims 20 to 22, characterized in that the thin layer (2) is madeintegral with a support (3) through the use of a brazing material. 29.Structure according to claim 28, characterized in that the brazingmaterial is based on indium.
 30. Structure according to any one ofclaims 20 to 29, characterized in that the material of the thin layer(2) is chosen from among SiC, GaAs and InP.
 31. Structure according toany one of claims 23 to 29, characterized in that the support (3) ismade of silicon.